The present invention relates to a semiconductor structure applicable to semiconductor devices such as MOSFET""s (insulated gate field effect transistors), IGBT""s (insulated gate bipolar transistors), bipolar transistors and diodes. More specifically, the present invention relates to a semiconductor device, which includes an alternating conductivity type layer that provides a current path in the ON-state of the semiconductor device and is depleted in the OFF-state of the semiconductor device.
Semiconductor devices may be roughly classified into lateral devices, in which the main electrodes thereof are arranged on one major surface, and vertical devices that distribute the main electrodes thereof on two major surfaces facing opposite to each other. In a vertical semiconductor device, a drift current flows vertically between the main electrodes in the ON-state of the device. To provide the vertical semiconductor device with a high breakdown voltage, it is necessary to thicken the highly resistive layer between the main electrodes. However, a thick, highly resistive layer inevitably causes high on-resistance that further increases loss. In other words, there exists a tradeoff relationship between the on-resistance (current capacity) and the breakdown voltage. The tradeoff relationship between the on-resistance and the breakdown voltage exists in semiconductor devices such as MOSFET""s, IGBT""s, bipolar transistors and diodes.
European Patent 0 053 854, U.S. Pat. Nos. 5,216,275, 5,438,215, and Japanese Unexamined Laid Open Patent Application H09-266311 disclose semiconductor devices, which include an alternating conductivity type layer formed of heavily doped n-type regions and heavily doped p-type regions alternately arranged to reduce the tradeoff relationship between the on-resistance and the breakdown voltage. The alternating conductivity type layer is depleted in the OFF-state of the semiconductor device to sustain the breakdown voltage. Hereinafter, the semiconductor device including an alternating conductivity type layer, that provides a current path in the ON-state of the device and is depleted in the OFF-state of the device, will be referred to as the xe2x80x9csuper-junction semiconductor devicexe2x80x9d.
The tradeoff relationship between the on-resistance and the breakdown voltage also exists in lateral semiconductor devices, in which current flows laterally between the main electrodes arranged on one of the major surfaces in the ON-state thereof. Forming the drift layer thereof of an alternating conductivity type layer including n-type regions and p-type regions arranged alternately reduces the tradeoff relation in the lateral semiconductor devices.
FIG. 12 is a perspective view of a fundamental lateral super-junction MOSFET. FIG. 13(a) is a cross sectional view along Axe2x80x94A of FIG. 12. In these figures, oxide films and metal films, excluding a polycrystalline silicon gate electrode 9, are not illustrated for the sake of easy understanding. Referring to FIG. 12, the lateral super-junction MOSFET has a lateral double-diffused MODFET structure formed in the surface portion of a n-type layer 4 on a p-type substrate 5. A drain section 11 includes a n+-type drain region 8 with low electrical resistance and a not shown drain electrode on n+-type drain region 8. A source section 13 includes a p-type well region 6, a n+-type source region 7 in the surface portion of p-type well region 6, and a not shown source electrode in contact with n+-type source region 7 and p-type well region 6. An alternating conductivity type layer 12 is between drain section 11 and source section 13. A drift section, that is alternating conductivity type layer 12, includes a comb-shaped n-type drift region 1 and p-type partition regions 2 between the teeth of comb-shaped n-type drift region 1. Hereinafter, the teeth of comb-shaped n-type drift region 1 will be referred to simply as the xe2x80x9cn-type drift regions 1xe2x80x9d. A drift current flows through n-type drift regions 1 of alternating conductivity type layer 12. Each region of alternating conductivity type layer 12 is from 1 to 10 xcexcm in width and, preferably, from 1 to 4 xcexcm in width. Alternating conductivity type layer 12 is from 1 to 10 xcexcm in depth and, preferably, from 1 to 4 xcexcm in depth. Alternating conductivity type layer 12 is around 50 xcexcm in width for the MOSFET of the 600 V class and around 100 xcexcm in width for the MOSFET of the 1000 V class.
In the lateral super-junction MOSFET configured as described above, a channel inversion layer 3 is formed below a gate electrode 9 when a voltage is applied between the drain electrode and the source electrode, and an appropriate voltage to gate electrode 9. Electrons flow into n-type drift regions 1 from n+-type source region 7 via channel inversion layer 3. As a result, a drift current flows due to the electric field between the drain electrode and the source electrode (the ON-state of the device). When the voltage is removed from gate electrode 9, channel inversion layer 3 vanishes. Depletion layers expand from the pn-junctions between n-type drift regions 1 and p-type well region 6 and from the pn-junctions between n-type drift regions 1 and p-type partition regions 2 into n-type drift regions 1 and n-type layer 4 due to the voltage between the drain electrode and the source electrode. As a result, n-type drift regions 1 and n-type layer 4 are depleted (the OFF-state of the device).
The depletion layers from the pn-junctions between n-type drift regions 1 and p-type partition regions 2 expand in the width direction of n-type drift regions 1. Since n-type drift regions 1 are narrow, n-type drift regions 1 are depleted very fast. Since p-type partition regions are also depleted, alternating conductivity type layer 12 facilitates providing the lateral super-junction MOSFET with a high breakdown voltage. Since n-type drift regions 1 may be doped heavily, alternating conductivity type layer 12 facilitates lowering the on-resistance of the lateral super-junction MOSFET.
An ideal relation between the on-resistance and the breakdown voltage per a unit area is expressed by the following equation:
R=BV2/(2Nxcex23EC3xcex50xcex5Sixcexc)xe2x80x83xe2x80x83(1)
where, R is the on-resistance per the unit area, BV the breakdown voltage, N the number of n-type drift regions 1 in alternating conductivity type layer 12, xcex2 the unknown coefficient, EC the critical electric field at the impurity concentration of the n-type drift region, xcex50 the dielectric permeability of the vacuum, xcex5Si the relative dielectric permeability of silicon, and the electron mobility.
As equation (1) indicates, the on-resistance is reduced dramatically by increasing the number N of n-type drift regions 1 in the alternating conductivity type layer. This principle is described in detail in Japanese Unexamined Laid Open Patent Application H09-266311.
FIG. 13(b) is a cross sectional view of a conventional lateral super-junction MOSFET, that employs a double reduced surface electric field structure (a double RESURF structure). Referring to FIG. 13(b), a lightly doped p-type layer 15 is interposed between n-type layer 4 and alternating conductivity type layer 12. This structure facilitates providing the device with a high breakdown voltage, since depletion layers expand into n-type layer 4 from the pn-junction between n-type layer 4 and p-type layer 15 and from the pn-junction between n-type layer 4 and p-type substrate 5.
Japanese Unexamined Laid Open Patent Application H10-321567 describes that it is effective to equalize the impurity concentrations and the widths of n-type drift regions 1 and p-type partition regions 2 for reducing the tradeoff relation between the on-resistance and the breakdown voltage and for realizing a high breakdown voltage. The means and the techniques disclosed in the foregoing publications for reducing the tradeoff relation between the on-resistance and the breakdown voltage are, however, still experimental and not always sufficient considering the mass-production.
As described in Japanese Unexamined Laid Open Patent Application H09-266311, the alternating conductivity type layers disclosed so far have been described only for the straight sections thereof, through which a drift current flows. Nothing has been described so far for the corner section, the bent section and such a curved section of the alternating conductivity type layer. It is difficult in practice for the lateral semiconductor devices to realize a high breakdown voltage without the structure of the curved section thereof. It is important to consider the structure of the curved section for relaxing the electric field in the curved section.
In view of the foregoing, it would be desirable to provide a lateral semiconductor device having an improved structure in the curved section thereof for providing the device with a high breakdown voltage. It would further be desirable to provide a lateral semiconductor device, that facilitates reducing the tradeoff relation between the on-resistance and the breakdown voltage and realizing a high breakdown voltage, and that is suited for mass-production.
According to an aspect of the present invention, there is provided a lateral semiconductor device including: a semiconductor chip; two main electrodes on one of the major surfaces of the semiconductor chip; an alternating conductivity type layer between the main electrodes; the alternating conductivity type layer including drift regions of a first conductivity type and partition regions of a second conductivity type; the drift regions and the partition regions being arranged alternately; and the alternating conductivity type layer being a closed loop surrounding one of the main electrodes.
In order to apply a high voltage between the drain section and the source section, it is necessary for the drain section and the source section to be spaced widely apart from each other. Or, it is necessary for the alternating conductivity type layer between the drain section and the source section to form a closed loop. Since the area of the semiconductor substrate is limited, it is hard to space the drain section and the source section away from each other.
Advantageously, the alternating conductivity type layer includes first sections, wherein the drift regions and the partition regions are arranged alternately at a first pitch, and second sections, wherein the drift regions and the partition regions are arranged alternately at a second pitch different from the first pitch. By appropriately selecting the locations of the first sections and the second sections, the breakdown voltage is prevented from being lowered in a part of the alternating conductivity type layer.
Advantageously, the alternating conductivity type layer includes one or more straight sections and one or more curved sections. By the configuration described above, the closed loop of the alternating conductivity type layer is easily formed. Preferably, the alternating conductivity type layer includes two or more straight sections and two or more curved sections. Alternatively the alternating conductivity type layer includes four or more straight sections and four or more curved sections.
Advantageously, the drift regions and the partition regions are arranged alternately at the first pitch in the straight sections and the drift regions and the partition regions are arranged alternately at the second pitch in the curved sections. By arranging the drift regions and the partition regions in the curved sections at the second pitch different from the first pitch in the straight sections, the arrangement of the drift regions and the partition regions in the curved sections is well balanced.
Advantageously, the first pitch is equal to or longer than the second pitch. By arranging the drift regions and the partition regions in the curved sections alternately at the short second pitch, depletion layers expand faster in the curved sections than in the straight sections when a reverse bias voltage is applied. As a result, the surface electric fields in the curved sections are relaxed.
Advantageously, the curved sections are doped substantially more lightly than the straight sections. Since the alternating conductivity type layer is depleted faster as the impurity concentration is lowered, the surface electric field is relaxed and the alternating conductivity type layer is provided with a higher breakdown voltage.
Advantageously, the curved sections are substantially intrinsic. When the curved sections are substantially intrinsic, the curved sections are depleted the fastest. Since the depletion layer expands easily into the substantially lightly doped region, the substantial impurity concentration thereof is low, and when a reverse bias voltage is applied, the electric field is relaxed and the substantially lightly doped region is provided with a high breakdown voltage.
Advantageously, the curved sections are doped with an n-type impurity and a p-type impurity. A substantially intrinsic impurity concentration is realized by doping an n-type impurity and a p-type impurity. When the impurity concentration in the curved section is very low, the second pitch in the curved section (longer than the first pitch in the straight section) poses no problem. When the impurity concentration in the curved section is very low, the curved section does not necessarily include any alternating conductivity type layer.
Advantageously, the width of the curved section is larger than the width of the straight section. Since the depleted area of the curved section is increased when the width of the curved section is larger than the width of the straight section, the curved section is provided with a higher breakdown voltage.
Advantageously, the lateral super-junction semiconductor device further includes one or more closed loops, each including an alternating conductivity type layer.
Advantageously, the width of the drift region or the partition region is from xc2xc to 4 times as large as the depth of the drift region or the partition region. It is difficult to form the drift region or the partition region since the depth thereof is much larger than the width thereof. When the width of the drift region or the partition region is much larger than the depth thereof, it is difficult to deplete the drift region or the partition region. Therefore, the above-described relation between the width and the depth of the drift region or the partition region is preferable.
Advantageously, the width of the alternating conductivity type layer is from 12.5 to 100 times as large as the width or the depth of the drift region or the partition region. When the ratio of the width of the alternating conductivity type layer and the width or the depth of the drift region or the partition region is less than 10, it is difficult to obtain a high breakdown voltage. When the ratio of the width of the alternating conductivity type layer and the width or the depth of the drift region or the partition region is more than 100, the surface area of the semiconductor substrate is occupied by the alternating conductivity type layer too widely, or it is difficult to form such a wide alternating conductivity type layer.
Advantageously, the lateral super-junction semiconductor device is a MOSFET, the drain electrode thereof is inside the closed loop, and the source electrode thereof is outside the closed loop. When a high voltage is applied to the drain electrode, which is inside the closed loop, the source electrode, having a wide area, is on the low potential side.
Advantageously, the lateral super-junction semiconductor device further includes a circuit for controlling the semiconductor device, for protecting the semiconductor device and for detecting the states of the semiconductor device; the circuit being outside the closed loop. The lateral super-junction semiconductor device according to the invention is applicable to semiconductor apparatus, which include the lateral super-junction semiconductor device and also the circuit for controlling, protecting, and for detecting the states of the semiconductor device.